For example, an examination for the electric characteristics of an electric circuit, such as, IC or LSI, formed on a semiconductor wafer (hereinafter referred as “wafer”) is performed using a probe card. The prove card has a contactor supporting a plurality of probes, and a circuit board electrically connected to the contactor. Between the contactor and circuit board, a supporting member for supporting the contactor is provided. On the surface on the contactor side of the circuit board, a connecting terminal for communicating an electronic signal between the probe and the circuit board is provided. And the examination of the electric characteristics of the electric circuit on the wafer is performed by contacting the plurality of probes onto electrodes of the electric circuit and applying an electronic signal to the electrodes from each probe through the circuit board with a printed circuit. (Japanese Unexamined Patent Application Publication No. 2002-151557).
When manufacturing such a probe card, normally, an inspection contacting structure 104, which is also called a probe head, having a contactor 102 supporting a plurality of probes 101 and a supporting member 103 have been assembled in advance as shown in FIG. 7. Further, on a surface of a circuit board 105, a connecting terminal 106 is formed, for example, by etching a film formed on the surface. A probe card 110 is then manufactured by attaching the supporting member 103 of the inspection contacting structure 104 to the surface of the circuit board 105 in which the connecting terminal 106 is formed.
By the way, there may be a case where an organic substrate, such as a glass epoxy substrate, is used as the circuit board 105 along with the increase in the wafer size in recent years. For example, the glass epoxy substrate is normally formed by stacking a plurality of glass epoxy layers and pressure bonding them, thereby a large sized circuit board can be formed. However, in the glass epoxy substrate, the flatness of its surface may be decreased because an adhesive agent used to bond each layer has significant effect in the variation in rate of remaining copper in each layer. For example, even in a case when the flatness is increased by controlling the adhesive agent or rate of remaining in copper in each layer, the flatness is about 50 μm. Thus, the circuit board 105 and the inspection contacting substrate 104 are not attached properly, which resulting in the variation of the height of the probe 101, and the examination of the electric characteristics of the electric circuit on the wafer can not be performed properly.
Further, when attempting to polish this surface to flatten the surface of the circuit board 105, the connecting terminal 106 formed on the surface of the circuit board 105 is also shaved off. Therefore, the surface of the circuit board 105 has not been able to be polished.
The present invention has been made considering above issues, and an objective is to improve the flatness of a circuit board for performing an inspection of the electric characteristics of a test object properly even in a case when an organic substrate is used as the circuit board for a probe card.